Siemens’ Veloce CS Chosen by Arm for Neoverse Compute Subsystems Verification and Validation

Key Takeaways

Siemens Digital Industries Software’s Veloce Strato CS and Veloce proFPGA CS are now deployed at Arm for enhancing design flow in Neoverse Compute Subsystems.
The Veloce CS system aims to accelerate time-to-market for Arm’s partners through pre-validation and verification tools.
The modular design of Veloce products ensures compliance with data center requirements while delivering high performance and scalability.

Enhanced Collaboration with Arm

Siemens Digital Industries Software recently announced the deployment of its Veloce Strato CS and Veloce proFPGA CS products at Arm, a long-term user of Siemens’ Veloce technology. This integration is part of an effort to improve the design flow for Arm® Neoverse™ Compute Subsystems (CSS).

Karima Dridi, Head of Productivity Engineering at Arm, emphasized the growing importance of time-to-market in a competitive computing landscape. She stated that innovative tools like the Siemens Veloce CS system enable partners to expedite the release of silicon solutions, crucial for maintaining competitiveness.

The collaboration reflects Siemens’ commitment to extending its relationship with Arm. Jean-Marie Brunet, Vice President and General Manager of Hardware-Assisted Verification at Siemens, highlighted the Veloce Strato CS’s capabilities in delivering significant emulation performance improvements and unique scaling potential. Meanwhile, Veloce proFPGA CS offers a scalable prototyping solution using the AMD VP1902 Adaptive SoC platform.

Features of Veloce CS System

The Veloce CS system is modular and blade-based, fully compliant with modern datacenter standards. This design facilitates easy installation, minimizes power consumption, provides superior cooling, and maintains a compact footprint. Additionally, the Veloce proFPGA CS can be equipped in a desktop lab version, giving users more options for deployment.

Veloce Strato CS stands out for its high emulation performance, boasting scalability from 40 million gates (MG) to 40 billion gates (BG). It incorporates Veloce PCIe Composite Device (PCD) technology, an emulation solution suite that aids in verifying customer Intellectual Property (IP) within Arm’s CSS framework. This technology integrates the Arm Compliance Suite (ACS), PCIe, and NVMe, offering a unified system visualization and debug environment backed by the Veloce Protocol Analyzer.

On the other hand, Veloce proFPGA CS provides an efficient and comprehensive software prototyping solution. It can scale from a single FPGA (VP 1902) to hundreds, significantly accelerating tasks related to firmware, operating system development, application development, and system integration.

The Veloce CS system’s emphasis on high performance and flexibility aligns with industry needs, promising to enhance the efficiency of System-on-a-Chip (SoC) and system-level verification and validation processes for Arm CSS users. Visitors interested in more information can find details on Siemens’ Veloce CS at Siemens’ official website.

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