Andes Technology Partners with Mirabilis Design to Develop System-Level Models for RISC-V Processor IP

Key Takeaways

Andes Technology and Mirabilis Design have formed a strategic partnership to enhance system-level architecture modeling for RISC-V processors.
The collaboration enables SoC architects to optimize designs early in the development cycle, significantly reducing risks and iteration time.
Mirabilis Design’s VisualSim® platform allows for multi-domain modeling, accelerating design cycles and power-performance optimization.

Strategic Collaboration for Enhanced RISC-V Processor Modeling

Andes Technology, a prominent provider of RISC-V processor intellectual property (IP), has announced a partnership with Mirabilis Design to create advanced system-level architecture models for its RISC-V processors. This collaboration aims to assist system-on-chip (SoC) architects in evaluating and optimizing their designs even before the register-transfer level (RTL) development phase begins, marking a significant stride in processor design efficiency.

Mirabilis Design has incorporated the capabilities of its VisualSim® platform to develop and validate system-level models for Andes’ AX66 multicore and A45 processors. These models enable architects to analyze performance, power consumption, and overall system behavior early in the design cycle. Consequently, this leads to a decrease in both iteration time and architectural risk.

The VisualSim® platform provides several key advantages for design teams:

Accelerated Design Cycles: By allowing for architectural explorations months ahead of RTL availability, VisualSim speeds up the overall development process.
Multi-Domain Modeling: The tool integrates simulations of computation, communication, and software scheduling in a single environment, leading to more cohesive design analysis.
Power-Performance Optimization: It facilitates early power modeling, enabling teams to effectively map tasks and assess bandwidth usage.
Trace-Driven Analysis: This feature helps design teams fine-tune performance metrics using realistic application workloads, ensuring that models reflect actual operational conditions.

Mirabilis Design, headquartered in Santa Clara, California, is known for its VisualSim Architect platform, which is utilized globally in various sectors, including semiconductors and aerospace. The recent adoption of VisualSim by global industry leaders, such as Samsung, further underscores its reputation as a premier platform for system-level innovation in modeling and simulation of complex electronic and embedded systems.

This collaboration between Andes Technology and Mirabilis Design is poised to transform how SoC designers approach processor architecture, promoting efficiency and innovation within the tech industry.

The content above is a summary. For more details, see the source article.