University of Minnesota Unveils LLM-Driven Chiplet Design Framework

Key Takeaways

Researchers from the University of Minnesota developed MAHL, a framework that enhances chiplet design using Large Language Models (LLMs).
MAHL leverages six collaborating agents to address challenges in chiplet design, achieving significant improvements in generation accuracy.
Compared to conventional methods, MAHL shows superior results in Power, Performance, and Area (PPA) optimization for chiplet designs.

Innovative Chiplet Design Framework

A recent technical paper titled “MAHL: Multi-Agent LLM-Guided Hierarchical Chiplet Design with Adaptive Debugging” has been released by a team of researchers at the University of Minnesota – Twin Cities. The work addresses the growing complexities of program workloads, particularly in AI, as they demand advanced computing capabilities and sophisticated memory management.

The primary focus of the research is the challenges inherent in chiplet design generated through LLMs, which has gained attention due to its cost-effectiveness and efficiency in component placement. However, existing methods face significant challenges such as design flattening, high validation costs, and imprecise optimization of parameters, which hinder the potential benefits of LLM-driven chip design.

To counter these issues, the authors introduced MAHL, a comprehensive framework that incorporates six interacting agents aimed at facilitating AI algorithm-hardware mapping. These agents work in unison to enhance the chiplet design process through the following capabilities:

Hierarchical description generation
Retrieval-augmented code generation
Diverse-flow validation
Multi-granularity exploration of design space

This collaborative approach ultimately leads to optimized chiplet designs with improved metrics for Power, Performance, and Area (PPA).

Experimental results demonstrate that MAHL significantly enhances the generation accuracy of simple Register Transfer Level (RTL) designs. In real-world chiplet design scenarios, MAHL achieved an impressive increase in generation accuracy, with a Pass@5 score rising from 0 to 0.72 compared to conventional LLMs in the best-case conditions. Moreover, against the expert-driven CLARIE model, MAHL delivered comparable or even superior PPA outcomes on specific optimization goals.

The implications of this research are substantial for the future of chip design, particularly as the demand for sophisticated AI hardware continues to soar. By harnessing the power of LLMs within a structured framework, MAHL stands to revolutionize the speed and accuracy of chiplet generation, facilitating more efficient hardware development and integration.

For more detailed information, the technical paper can be accessed here.

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